The processing overhead associated with routing packets in packet-switched networks is a major hurdle in implementing high-bandwidth networks. High capacity networks capable of efficiently handling voice, video, and data are necessary to satisfy the growing demand of telecommunication and multimedia services. All-optical communication networks are likely to be the networks of the future in view of their relatively large bandwidths. However, presently implementation of such networks is limited by available switching technologies. Current wavelength division multiplexing networks employ circuit-switching technology making them unsuitable for data applications involving bursty traffic requiring large bandwidth. In part, the challenge is due to the lack of practical optical buffers and the relatively limited number of photonic devices available in comparison to electronics present challenges in implementing optical packet switched networks. See, e.g., Chan et al. and Yao, S. et al., “Advances in photonic packet switching: An overview,” IEEE Comm. Magazine, vol. 38, No. 2, pp. 84-94 (2000).
Faster switching via optics based logic is a future possibility. In optical packet-switched networks, the optical data needs to be processed and switched at the line speed of ten to hundreds of gigabits per second. Recent advances in optical logic device research demonstrate implementations of boolean logic functions such as AND, OR, NOR, INVERT, and XOR based on ultrafast nonlinear interferometers. Some exemplary references are Doran N. J. et al. “Nonlinear-optical loop mirror,” Optics Letters, vol. 13, pp. 56-58 (1988); and Whitaker, Jr., N. A. et al., “All-optical arbitrary demultiplexing at 2.5 Gb/s with tolerance to timing jitter,” Optics Letters, vol. 16, pp. 1838-1840 (1991). However, optical logic devices continue to be bulky making integration difficult. Consequently, complex optical logic circuits are still unavailable.
Another solution for implementing optical packet networks for taking advantage of their bandwidth is transmitting the packet header at a lower speed in another channel as in optical sub-carrier multiplexing, see, e.g., Carena, A. et al., “OPERA: an optical packet experimental routing architecture with label swapping capability,” Journal of Light wave Technology , vol. 16, No. 12, pp. 2135-2145 (1998); and Blumenthal, D. J. et al., “WDM optical IP tap switching with packet-rate wavelength conversion and subcarrier multiplexed addressing,” OFC'99, pp. 162-164 (1999) and optical burst switching, see, e.g., Xiao, C. et al., “Optical burst switching (OBS)—a new paradigm for an optical Internet,” Journal of High Speed Networks, vol. 8, pp. 69-84 (1999). These methods, however, are sensitive to the synchronization between the processing of the packet payload and the packet header. Consequently, being relatively intolerant of errors, they have questionable reliability.
Another approach for effective use of optical networks with current technology is to reduce the processing requirements, such as switching packets at a node. Such processing relies on electronic or optical switches and processors, thus forming a natural bottleneck. A known technique for reducing processing in routing packets in a network is to assign self-routing addresses to nodes in the network. Self-routing addresses simplify routing control since the address of a node contains all the routing information necessary for other nodes to direct packets to the destination without requiring look-up tables and similar customary processing steps. Intermediate nodes forward the incoming packets to the appropriate output ports using bit-by-bit comparison of the packet headers with the address of the local node. The routing decision, implemented with simple logic gates, does not require the typical lookup tables.
However, self-routing addresses are known to be suitable only for networks with regular topology such as hypercube networks and the Shuffle Net with no more than one address for each node. In other words, implementing self-routing addresses in a network requires mapping the physical topology of the network to logical networks with regular topology. See, e.g., Tan, S. T. et al., “Embedded unidirectional incomplete hypercube for optical networks,” IEEE Transactions on Communications , vol. 41, No. 9, pp. 1284-1289 (1993); and Kop, C. K. et al., “Multi-access processor interconnection using subcarrier and wavelength division multiplexing,” Journal of Lightwave Technology, vol.15, No.2, pp.228-241(1997). This is typically not possible in most networks. An additional drawback of self-routing addresses is that all paths between nodes are fixed resulting in difficulties in implementing congestion control and traffic engineering along with rerouting.